MX1 Full
These are the register addresses for the MX1, each of the SET,CLR and INV are given as a separate address. The green URL is the address of the file where they are contained so this can be included into the program or use the 'expand source' to pick out the registers relevant to your use.
Updated Feb 2014 to include port C, part of the PIC32MX150F128D type processor
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_adc.bas
// MX1 registers ADC // constant AD1CON1 0xBF809000 constant AD1CON1CLR 0xBF809004 constant AD1CON1SET 0xBF809008 constant AD1CON1INV 0xBF80900C constant AD1CON2 0xBF809010 constant AD1CON2CLR 0xBF809014 constant AD1CON2SET 0xBF809018 constant AD1CON2INV 0xBF80901C constant AD1CON3 0xBF809020 constant AD1CON3CLR 0xBF809024 constant AD1CON3SET 0xBF809028 constant AD1CON3INV 0xBF80902C constant AD1CHS 0xBF809040 constant AD1CHSCLR 0xBF809044 constant AD1CHSSET 0xBF809048 constant AD1CHSINV 0xBF80904C constant AD1CSSL 0xBF809050 constant AD1CSSLCLR 0xBF809054 constant AD1CSSLSET 0xBF809058 constant AD1CSSLINV 0xBF80905C constant ADC1BUF0 0xBF809070 constant ADC1BUF1 0xBF809080 constant ADC1BUF2 0xBF809090 constant ADC1BUF3 0xBF8090A0 constant ADC1BUF4 0xBF8090B0 constant ADC1BUF5 0xBF8090C0 constant ADC1BUF6 0xBF8090D0 constant ADC1BUF7 0xBF8090E0 constant ADC1BUF8 0xBF8090F0 constant ADC1BUF9 0xBF809100 constant ADC1BUFA 0xBF809110 constant ADC1BUFB 0xBF809120 constant ADC1BUFC 0xBF809130 constant ADC1BUFD 0xBF809140 constant ADC1BUFE 0xBF809150 constant ADC1BUFF 0xBF809160
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_busmatrix.bas
// MX1 register - bus matrix // constant BMXCON 0xBF882000 constant BMXCONCLR 0xBF882004 constant BMXCONSET 0xBF882008 constant BMXCONINV 0xBF88200C constant BMXDKPBA 0xBF882010 constant BMXDKPBACLR 0xBF882014 constant BMXDKPBASET 0xBF882018 constant BMXDKPBAINV 0xBF88201C constant BMXDUDBA 0xBF882020 constant BMXDUDBACLR 0xBF882024 constant BMXDUDBASET 0xBF882028 constant BMXDUDBAINV 0xBF88202C constant BMXDUPBA 0xBF882030 constant BMXDUPBACLR 0xBF882034 constant BMXDUPBASET 0xBF882038 constant BMXDUPBAINV 0xBF88203C constant BMXDRMSZ 0xBF882040 constant BMXPUPBA 0xBF882050 constant BMXPUPBACLR 0xBF882054 constant BMXPUPBASET 0xBF882058 constant BMXPUPBAINV 0xBF88205C constant BMXPFMSZ 0xBF882060 constant BMXBOOTSZ 0xBF882070
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_comparator.bas
// MX1 registers Comparator // constant CVRCON 0xBF809800 constant CVRCONCLR 0xBF809804 constant CVRCONSET 0xBF809808 constant CVRCONINV 0xBF80980C constant CM1CON 0xBF80A000 constant CM1CONCLR 0xBF80A004 constant CM1CONSET 0xBF80A008 constant CM1CONINV 0xBF80A00C constant CM2CON 0xBF80A010 constant CM2CONCLR 0xBF80A014 constant CM2CONSET 0xBF80A018 constant CM2CONINV 0xBF80A01C constant CM3CON 0xBF80A020 constant CM3CONCLR 0xBF80A024 constant CM3CONSET 0xBF80A028 constant CM3CONINV 0xBF80A02C constant CMSTAT 0xBF80A060 constant CMSTATCLR 0xBF80A064 constant CMSTATSET 0xBF80A068 constant CMSTATINV 0xBF80A06C constant CTMUCON 0xBF80A200 constant CTMUCONCLR 0xBF80A204 constant CTMUCONSET 0xBF80A208 constant CTMUCONINV 0xBF80A20C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_dma.bas
// MX1 registers DMA - all 3 channels // constant DMACON 0xBF883000 constant DMACONCLR 0xBF883004 constant DMACONSET 0xBF883008 constant DMACONINV 0xBF88300C constant DMASTAT 0xBF883010 constant DMASTATCLR 0xBF883014 constant DMASTATSET 0xBF883018 constant DMASTATINV 0xBF88301C constant DMAADDR 0xBF883020 constant DMAADDRCLR 0xBF883024 constant DMAADDRSET 0xBF883028 constant DMAADDRINV 0xBF88302C constant DCRCCON 0xBF883030 constant DCRCCONCLR 0xBF883034 constant DCRCCONSET 0xBF883038 constant DCRCCONINV 0xBF88303C constant DCRCDATA 0xBF883040 constant DCRCDATACLR 0xBF883044 constant DCRCDATASET 0xBF883048 constant DCRCDATAINV 0xBF88304C constant DCRCXOR 0xBF883050 constant DCRCXORCLR 0xBF883054 constant DCRCXORSET 0xBF883058 constant DCRCXORINV 0xBF88305C constant DCH0CON 0xBF883060 constant DCH0CONCLR 0xBF883064 constant DCH0CONSET 0xBF883068 constant DCH0CONINV 0xBF88306C constant DCH0ECON 0xBF883070 constant DCH0ECONCLR 0xBF883074 constant DCH0ECONSET 0xBF883078 constant DCH0ECONINV 0xBF88307C constant DCH0INT 0xBF883080 constant DCH0INTCLR 0xBF883084 constant DCH0INTSET 0xBF883088 constant DCH0INTINV 0xBF88308C constant DCH0SSA 0xBF883090 constant DCH0SSACLR 0xBF883094 constant DCH0SSASET 0xBF883098 constant DCH0SSAINV 0xBF88309C constant DCH0DSA 0xBF8830A0 constant DCH0DSACLR 0xBF8830A4 constant DCH0DSASET 0xBF8830A8 constant DCH0DSAINV 0xBF8830AC constant DCH0SSIZ 0xBF8830B0 constant DCH0SSIZCLR 0xBF8830B4 constant DCH0SSIZSET 0xBF8830B8 constant DCH0SSIZINV 0xBF8830BC constant DCH0DSIZ 0xBF8830C0 constant DCH0DSIZCLR 0xBF8830C4 constant DCH0DSIZSET 0xBF8830C8 constant DCH0DSIZINV 0xBF8830CC constant DCH0SPTR 0xBF8830D0 constant DCH0SPTRCLR 0xBF8830D4 constant DCH0SPTRSET 0xBF8830D8 constant DCH0SPTRINV 0xBF8830DC constant DCH0DPTR 0xBF8830E0 constant DCH0DPTRCLR 0xBF8830E4 constant DCH0DPTRSET 0xBF8830E8 constant DCH0DPTRINV 0xBF8830EC constant DCH0CSIZ 0xBF8830F0 constant DCH0CSIZCLR 0xBF8830F4 constant DCH0CSIZSET 0xBF8830F8 constant DCH0CSIZINV 0xBF8830FC constant DCH0CPTR 0xBF883100 constant DCH0CPTRCLR 0xBF883104 constant DCH0CPTRSET 0xBF883108 constant DCH0CPTRINV 0xBF88310C constant DCH0DAT 0xBF883110 constant DCH0DATCLR 0xBF883114 constant DCH0DATSET 0xBF883118 constant DCH0DATINV 0xBF88311C constant DCH1CON 0xBF883120 constant DCH1CONCLR 0xBF883124 constant DCH1CONSET 0xBF883128 constant DCH1CONINV 0xBF88312C constant DCH1ECON 0xBF883130 constant DCH1ECONCLR 0xBF883134 constant DCH1ECONSET 0xBF883138 constant DCH1ECONINV 0xBF88313C constant DCH1INT 0xBF883140 constant DCH1INTCLR 0xBF883144 constant DCH1INTSET 0xBF883148 constant DCH1INTINV 0xBF88314C constant DCH1SSA 0xBF883150 constant DCH1SSACLR 0xBF883154 constant DCH1SSASET 0xBF883158 constant DCH1SSAINV 0xBF88315C constant DCH1DSA 0xBF883160 constant DCH1DSACLR 0xBF883164 constant DCH1DSASET 0xBF883168 constant DCH1DSAINV 0xBF88316C constant DCH1SSIZ 0xBF883170 constant DCH1SSIZCLR 0xBF883174 constant DCH1SSIZSET 0xBF883178 constant DCH1SSIZINV 0xBF88317C constant DCH1DSIZ 0xBF883180 constant DCH1DSIZCLR 0xBF883184 constant DCH1DSIZSET 0xBF883188 constant DCH1DSIZINV 0xBF88318C constant DCH1SPTR 0xBF883190 constant DCH1SPTRCLR 0xBF883194 constant DCH1SPTRSET 0xBF883198 constant DCH1SPTRINV 0xBF88319C constant DCH1DPTR 0xBF8831A0 constant DCH1DPTRCLR 0xBF8831A4 constant DCH1DPTRSET 0xBF8831A8 constant DCH1DPTRINV 0xBF8831AC constant DCH1CSIZ 0xBF8831B0 constant DCH1CSIZCLR 0xBF8831B4 constant DCH1CSIZSET 0xBF8831B8 constant DCH1CSIZINV 0xBF8831BC constant DCH1CPTR 0xBF8831C0 constant DCH1CPTRCLR 0xBF8831C4 constant DCH1CPTRSET 0xBF8831C8 constant DCH1CPTRINV 0xBF8831CC constant DCH1DAT 0xBF8831D0 constant DCH1DATCLR 0xBF8831D4 constant DCH1DATSET 0xBF8831D8 constant DCH1DATINV 0xBF8831DC constant DCH2CON 0xBF8831E0 constant DCH2CONCLR 0xBF8831E4 constant DCH2CONSET 0xBF8831E8 constant DCH2CONINV 0xBF8831EC constant DCH2ECON 0xBF8831F0 constant DCH2ECONCLR 0xBF8831F4 constant DCH2ECONSET 0xBF8831F8 constant DCH2ECONINV 0xBF8831FC constant DCH2INT 0xBF883200 constant DCH2INTCLR 0xBF883204 constant DCH2INTSET 0xBF883208 constant DCH2INTINV 0xBF88320C constant DCH2SSA 0xBF883210 constant DCH2SSACLR 0xBF883214 constant DCH2SSASET 0xBF883218 constant DCH2SSAINV 0xBF88321C constant DCH2DSA 0xBF883220 constant DCH2DSACLR 0xBF883224 constant DCH2DSASET 0xBF883228 constant DCH2DSAINV 0xBF88322C constant DCH2SSIZ 0xBF883230 constant DCH2SSIZCLR 0xBF883234 constant DCH2SSIZSET 0xBF883238 constant DCH2SSIZINV 0xBF88323C constant DCH2DSIZ 0xBF883240 constant DCH2DSIZCLR 0xBF883244 constant DCH2DSIZSET 0xBF883248 constant DCH2DSIZINV 0xBF88324C constant DCH2SPTR 0xBF883250 constant DCH2SPTRCLR 0xBF883254 constant DCH2SPTRSET 0xBF883258 constant DCH2SPTRINV 0xBF88325C constant DCH2DPTR 0xBF883260 constant DCH2DPTRCLR 0xBF883264 constant DCH2DPTRSET 0xBF883268 constant DCH2DPTRINV 0xBF88326C constant DCH2CSIZ 0xBF883270 constant DCH2CSIZCLR 0xBF883274 constant DCH2CSIZSET 0xBF883278 constant DCH2CSIZINV 0xBF88327C constant DCH2CPTR 0xBF883280 constant DCH2CPTRCLR 0xBF883284 constant DCH2CPTRSET 0xBF883288 constant DCH2CPTRINV 0xBF88328C constant DCH2DAT 0xBF883290 constant DCH2DATCLR 0xBF883294 constant DCH2DATSET 0xBF883298 constant DCH2DATINV 0xBF88329C constant DCH3CON 0xBF8832A0 constant DCH3CONCLR 0xBF8832A4 constant DCH3CONSET 0xBF8832A8 constant DCH3CONINV 0xBF8832AC constant DCH3ECON 0xBF8832B0 constant DCH3ECONCLR 0xBF8832B4 constant DCH3ECONSET 0xBF8832B8 constant DCH3ECONINV 0xBF8832BC constant DCH3INT 0xBF8832C0 constant DCH3INTCLR 0xBF8832C4 constant DCH3INTSET 0xBF8832C8 constant DCH3INTINV 0xBF8832CC constant DCH3SSA 0xBF8832D0 constant DCH3SSACLR 0xBF8832D4 constant DCH3SSASET 0xBF8832D8 constant DCH3SSAINV 0xBF8832DC constant DCH3DSA 0xBF8832E0 constant DCH3DSACLR 0xBF8832E4 constant DCH3DSASET 0xBF8832E8 constant DCH3DSAINV 0xBF8832EC constant DCH3SSIZ 0xBF8832F0 constant DCH3SSIZCLR 0xBF8832F4 constant DCH3SSIZSET 0xBF8832F8 constant DCH3SSIZINV 0xBF8832FC constant DCH3DSIZ 0xBF883300 constant DCH3DSIZCLR 0xBF883304 constant DCH3DSIZSET 0xBF883308 constant DCH3DSIZINV 0xBF88330C constant DCH3SPTR 0xBF883310 constant DCH3SPTRCLR 0xBF883314 constant DCH3SPTRSET 0xBF883318 constant DCH3SPTRINV 0xBF88331C constant DCH3DPTR 0xBF883320 constant DCH3DPTRCLR 0xBF883324 constant DCH3DPTRSET 0xBF883328 constant DCH3DPTRINV 0xBF88332C constant DCH3CSIZ 0xBF883330 constant DCH3CSIZCLR 0xBF883334 constant DCH3CSIZSET 0xBF883338 constant DCH3CSIZINV 0xBF88333C constant DCH3CPTR 0xBF883340 constant DCH3CPTRCLR 0xBF883344 constant DCH3CPTRSET 0xBF883348 constant DCH3CPTRINV 0xBF88334C constant DCH3DAT 0xBF883350 constant DCH3DATCLR 0xBF883354 constant DCH3DATSET 0xBF883358 constant DCH3DATINV 0xBF88335C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_i2c.bas
// MX1 registers I2C // constant I2C1ACON 0xBF805000 constant I2C1CON 0xBF805000 constant I2C1ACONCLR 0xBF805004 constant I2C1CONCLR 0xBF805004 constant I2C1ACONSET 0xBF805008 constant I2C1CONSET 0xBF805008 constant I2C1ACONINV 0xBF80500C constant I2C1CONINV 0xBF80500C constant I2C1ASTAT 0xBF805010 constant I2C1STAT 0xBF805010 constant I2C1ASTATCLR 0xBF805014 constant I2C1STATCLR 0xBF805014 constant I2C1ASTATSET 0xBF805018 constant I2C1STATSET 0xBF805018 constant I2C1ASTATINV 0xBF80501C constant I2C1STATINV 0xBF80501C constant I2C1AADD 0xBF805020 constant I2C1ADD 0xBF805020 constant I2C1AADDCLR 0xBF805024 constant I2C1ADDCLR 0xBF805024 constant I2C1AADDSET 0xBF805028 constant I2C1ADDSET 0xBF805028 constant I2C1AADDINV 0xBF80502C constant I2C1ADDINV 0xBF80502C constant I2C1AMSK 0xBF805030 constant I2C1MSK 0xBF805030 constant I2C1AMSKCLR 0xBF805034 constant I2C1MSKCLR 0xBF805034 constant I2C1AMSKSET 0xBF805038 constant I2C1MSKSET 0xBF805038 constant I2C1AMSKINV 0xBF80503C constant I2C1MSKINV 0xBF80503C constant I2C1ABRG 0xBF805040 constant I2C1BRG 0xBF805040 constant I2C1ABRGCLR 0xBF805044 constant I2C1BRGCLR 0xBF805044 constant I2C1ABRGSET 0xBF805048 constant I2C1BRGSET 0xBF805048 constant I2C1ABRGINV 0xBF80504C constant I2C1BRGINV 0xBF80504C constant I2C1ATRN 0xBF805050 constant I2C1TRN 0xBF805050 constant I2C1ATRNCLR 0xBF805054 constant I2C1TRNCLR 0xBF805054 constant I2C1ATRNSET 0xBF805058 constant I2C1TRNSET 0xBF805058 constant I2C1ATRNINV 0xBF80505C constant I2C1TRNINV 0xBF80505C constant I2C1ARCV 0xBF805060 constant I2C1RCV 0xBF805060 constant I2C2ACON 0xBF805100 constant I2C2CON 0xBF805100 constant I2C2ACONCLR 0xBF805104 constant I2C2CONCLR 0xBF805104 constant I2C2ACONSET 0xBF805108 constant I2C2CONSET 0xBF805108 constant I2C2ACONINV 0xBF80510C constant I2C2CONINV 0xBF80510C constant I2C2ASTAT 0xBF805110 constant I2C2STAT 0xBF805110 constant I2C2ASTATCLR 0xBF805114 constant I2C2STATCLR 0xBF805114 constant I2C2ASTATSET 0xBF805118 constant I2C2STATSET 0xBF805118 constant I2C2ASTATINV 0xBF80511C constant I2C2STATINV 0xBF80511C constant I2C2AADD 0xBF805120 constant I2C2ADD 0xBF805120 constant I2C2AADDCLR 0xBF805124 constant I2C2ADDCLR 0xBF805124 constant I2C2AADDSET 0xBF805128 constant I2C2ADDSET 0xBF805128 constant I2C2AADDINV 0xBF80512C constant I2C2ADDINV 0xBF80512C constant I2C2AMSK 0xBF805130 constant I2C2MSK 0xBF805130 constant I2C2AMSKCLR 0xBF805134 constant I2C2MSKCLR 0xBF805134 constant I2C2AMSKSET 0xBF805138 constant I2C2MSKSET 0xBF805138 constant I2C2AMSKINV 0xBF80513C constant I2C2MSKINV 0xBF80513C constant I2C2ABRG 0xBF805140 constant I2C2BRG 0xBF805140 constant I2C2ABRGCLR 0xBF805144 constant I2C2BRGCLR 0xBF805144 constant I2C2ABRGSET 0xBF805148 constant I2C2BRGSET 0xBF805148 constant I2C2ABRGINV 0xBF80514C constant I2C2BRGINV 0xBF80514C constant I2C2ATRN 0xBF805150 constant I2C2TRN 0xBF805150 constant I2C2ATRNCLR 0xBF805154 constant I2C2TRNCLR 0xBF805154 constant I2C2ATRNSET 0xBF805158 constant I2C2TRNSET 0xBF805158 constant I2C2ATRNINV 0xBF80515C constant I2C2TRNINV 0xBF80515C constant I2C2ARCV 0xBF805160 constant I2C2RCV 0xBF805160
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_inputCap.bas
// MX1 Input capture registers // constant IC1CON 0xBF802000 constant IC1CONCLR 0xBF802004 constant IC1CONSET 0xBF802008 constant IC1CONINV 0xBF80200C constant IC1BUF 0xBF802010 constant IC2CON 0xBF802200 constant IC2CONCLR 0xBF802204 constant IC2CONSET 0xBF802208 constant IC2CONINV 0xBF80220C constant IC2BUF 0xBF802210 constant IC3CON 0xBF802400 constant IC3CONCLR 0xBF802404 constant IC3CONSET 0xBF802408 constant IC3CONINV 0xBF80240C constant IC3BUF 0xBF802410 constant IC4CON 0xBF802600 constant IC4CONCLR 0xBF802604 constant IC4CONSET 0xBF802608 constant IC4CONINV 0xBF80260C constant IC4BUF 0xBF802610 constant IC5CON 0xBF802800 constant IC5CONCLR 0xBF802804 constant IC5CONSET 0xBF802808 constant IC5CONINV 0xBF80280C constant IC5BUF 0xBF802810
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_interrupt.bas
// MX1 registers - interrupt // constant INTCON 0xBF881000 constant INTCONCLR 0xBF881004 constant INTCONSET 0xBF881008 constant INTCONINV 0xBF88100C constant INTSTAT 0xBF881010 constant IPTMR 0xBF881020 constant IPTMRCLR 0xBF881024 constant IPTMRSET 0xBF881028 constant IPTMRINV 0xBF88102C constant IFS0 0xBF881030 constant IFS0CLR 0xBF881034 constant IFS0SET 0xBF881038 constant IFS0INV 0xBF88103C constant IFS1 0xBF881040 constant IFS1CLR 0xBF881044 constant IFS1SET 0xBF881048 constant IFS1INV 0xBF88104C constant IEC0 0xBF881060 constant IEC0CLR 0xBF881064 constant IEC0SET 0xBF881068 constant IEC0INV 0xBF88106C constant IEC1 0xBF881070 constant IEC1CLR 0xBF881074 constant IEC1SET 0xBF881078 constant IEC1INV 0xBF88107C constant IPC0 0xBF881090 constant IPC0CLR 0xBF881094 constant IPC0SET 0xBF881098 constant IPC0INV 0xBF88109C constant IPC1 0xBF8810A0 constant IPC1CLR 0xBF8810A4 constant IPC1SET 0xBF8810A8 constant IPC1INV 0xBF8810AC constant IPC2 0xBF8810B0 constant IPC2CLR 0xBF8810B4 constant IPC2SET 0xBF8810B8 constant IPC2INV 0xBF8810BC constant IPC3 0xBF8810C0 constant IPC3CLR 0xBF8810C4 constant IPC3SET 0xBF8810C8 constant IPC3INV 0xBF8810CC constant IPC4 0xBF8810D0 constant IPC4CLR 0xBF8810D4 constant IPC4SET 0xBF8810D8 constant IPC4INV 0xBF8810DC constant IPC5 0xBF8810E0 constant IPC5CLR 0xBF8810E4 constant IPC5SET 0xBF8810E8 constant IPC5INV 0xBF8810EC constant IPC6 0xBF8810F0 constant IPC6CLR 0xBF8810F4 constant IPC6SET 0xBF8810F8 constant IPC6INV 0xBF8810FC constant IPC7 0xBF881100 constant IPC7CLR 0xBF881104 constant IPC7SET 0xBF881108 constant IPC7INV 0xBF88110C constant IPC8 0xBF881110 constant IPC8CLR 0xBF881114 constant IPC8SET 0xBF881118 constant IPC8INV 0xBF88111C constant IPC9 0xBF881120 constant IPC9CLR 0xBF881124 constant IPC9SET 0xBF881128 constant IPC9INV 0xBF88112C constant IPC10 0xBF881130 constant IPC10CLR 0xBF881134 constant IPC10SET 0xBF881138 constant IPC10INV 0xBF88113C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_outputCompare.bas
// MX1 Registers, output compare // constant OC1CON 0xBF803000 constant OC1CONCLR 0xBF803004 constant OC1CONSET 0xBF803008 constant OC1CONINV 0xBF80300C constant OC1R 0xBF803010 constant OC1RCLR 0xBF803014 constant OC1RSET 0xBF803018 constant OC1RINV 0xBF80301C constant OC1RS 0xBF803020 constant OC1RSCLR 0xBF803024 constant OC1RSSET 0xBF803028 constant OC1RSINV 0xBF80302C constant OC2CON 0xBF803200 constant OC2CONCLR 0xBF803204 constant OC2CONSET 0xBF803208 constant OC2CONINV 0xBF80320C constant OC2R 0xBF803210 constant OC2RCLR 0xBF803214 constant OC2RSET 0xBF803218 constant OC2RINV 0xBF80321C constant OC2RS 0xBF803220 constant OC2RSCLR 0xBF803224 constant OC2RSSET 0xBF803228 constant OC2RSINV 0xBF80322C constant OC3CON 0xBF803400 constant OC3CONCLR 0xBF803404 constant OC3CONSET 0xBF803408 constant OC3CONINV 0xBF80340C constant OC3R 0xBF803410 constant OC3RCLR 0xBF803414 constant OC3RSET 0xBF803418 constant OC3RINV 0xBF80341C constant OC3RS 0xBF803420 constant OC3RSCLR 0xBF803424 constant OC3RSSET 0xBF803428 constant OC3RSINV 0xBF80342C constant OC4CON 0xBF803600 constant OC4CONCLR 0xBF803604 constant OC4CONSET 0xBF803608 constant OC4CONINV 0xBF80360C constant OC4R 0xBF803610 constant OC4RCLR 0xBF803614 constant OC4RSET 0xBF803618 constant OC4RINV 0xBF80361C constant OC4RS 0xBF803620 constant OC4RSCLR 0xBF803624 constant OC4RSSET 0xBF803628 constant OC4RSINV 0xBF80362C constant OC5CON 0xBF803800 constant OC5CONCLR 0xBF803804 constant OC5CONSET 0xBF803808 constant OC5CONINV 0xBF80380C constant OC5R 0xBF803810 constant OC5RCLR 0xBF803814 constant OC5RSET 0xBF803818 constant OC5RINV 0xBF80381C constant OC5RS 0xBF803820 constant OC5RSCLR 0xBF803824 constant OC5RSSET 0xBF803828 constant OC5RSINV 0xBF80382C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_pmp.bas
// MX1 registers Parallel mater port // constant PMCON 0xBF807000 constant PMCONCLR 0xBF807004 constant PMCONSET 0xBF807008 constant PMCONINV 0xBF80700C constant PMMODE 0xBF807010 constant PMMODECLR 0xBF807014 constant PMMODESET 0xBF807018 constant PMMODEINV 0xBF80701C constant PMADDR 0xBF807020 constant PMADDRCLR 0xBF807024 constant PMADDRSET 0xBF807028 constant PMADDRINV 0xBF80702C constant PMDOUT 0xBF807030 constant PMDOUTCLR 0xBF807034 constant PMDOUTSET 0xBF807038 constant PMDOUTINV 0xBF80703C constant PMDIN 0xBF807040 constant PMDINCLR 0xBF807044 constant PMDINSET 0xBF807048 constant PMDININV 0xBF80704C constant PMAEN 0xBF807050 constant PMAENCLR 0xBF807054 constant PMAENSET 0xBF807058 constant PMAENINV 0xBF80705C constant PMSTAT 0xBF807060 constant PMSTATCLR 0xBF807064 constant PMSTATSET 0xBF807068 constant PMSTATINV 0xBF80706C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_ports.bas
// MX1 registers Ports A and B // constant ANSELA 0xBF886000 constant ANSELACLR 0xBF886004 constant ANSELASET 0xBF886008 constant ANSELAINV 0xBF88600C constant TRISA 0xBF886010 constant TRISACLR 0xBF886014 constant TRISASET 0xBF886018 constant TRISAINV 0xBF88601C constant PORTA 0xBF886020 constant PORTACLR 0xBF886024 constant PORTASET 0xBF886028 constant PORTAINV 0xBF88602C constant LATA 0xBF886030 constant LATACLR 0xBF886034 constant LATASET 0xBF886038 constant LATAINV 0xBF88603C constant ODCA 0xBF886040 constant ODCACLR 0xBF886044 constant ODCASET 0xBF886048 constant ODCAINV 0xBF88604C constant CNPUA 0xBF886050 constant CNPUACLR 0xBF886054 constant CNPUASET 0xBF886058 constant CNPUAINV 0xBF88605C constant CNPDA 0xBF886060 constant CNPDACLR 0xBF886064 constant CNPDASET 0xBF886068 constant CNPDAINV 0xBF88606C constant CNCONA 0xBF886070 constant CNCONACLR 0xBF886074 constant CNCONASET 0xBF886078 constant CNCONAINV 0xBF88607C constant CNENA 0xBF886080 constant CNENACLR 0xBF886084 constant CNENASET 0xBF886088 constant CNENAINV 0xBF88608C constant CNSTATA 0xBF886090 constant CNSTATACLR 0xBF886094 constant CNSTATASET 0xBF886098 constant CNSTATAINV 0xBF88609C constant ANSELB 0xBF886100 constant ANSELBCLR 0xBF886104 constant ANSELBSET 0xBF886108 constant ANSELBINV 0xBF88610C constant TRISB 0xBF886110 constant TRISBCLR 0xBF886114 constant TRISBSET 0xBF886118 constant TRISBINV 0xBF88611C constant PORTB 0xBF886120 constant PORTBCLR 0xBF886124 constant PORTBSET 0xBF886128 constant PORTBINV 0xBF88612C constant LATB 0xBF886130 constant LATBCLR 0xBF886134 constant LATBSET 0xBF886138 constant LATBINV 0xBF88613C constant ODCB 0xBF886140 constant ODCBCLR 0xBF886144 constant ODCBSET 0xBF886148 constant ODCBINV 0xBF88614C constant CNPUB 0xBF886150 constant CNPUBCLR 0xBF886154 constant CNPUBSET 0xBF886158 constant CNPUBINV 0xBF88615C constant CNPDB 0xBF886160 constant CNPDBCLR 0xBF886164 constant CNPDBSET 0xBF886168 constant CNPDBINV 0xBF88616C constant CNCONB 0xBF886170 constant CNCONBCLR 0xBF886174 constant CNCONBSET 0xBF886178 constant CNCONBINV 0xBF88617C constant CNENB 0xBF886180 constant CNENBCLR 0xBF886184 constant CNENBSET 0xBF886188 constant CNENBINV 0xBF88618C constant CNSTATB 0xBF886190 constant CNSTATBCLR 0xBF886194 constant CNSTATBSET 0xBF886198 constant CNSTATBINV 0xBF88619C constant ANSELC 0xBF886200 constant ANSELCCLR 0xBF886204 constant ANSELCSET 0xBF886208 constant ANSELCINV 0xBF88620C constant TRISC 0xBF886210 constant TRISCCLR 0xBF886214 constant TRISCSET 0xBF886218 constant TRISCINV 0xBF88621C constant PORTC 0xBF886220 constant PORTCCLR 0xBF886224 constant PORTCSET 0xBF886228 constant PORTCINV 0xBF88622C constant LATC 0xBF886230 constant LATCCLR 0xBF886234 constant LATCSET 0xBF886238 constant LATCINV 0xBF88623C constant ODCC 0xBF886240 constant ODCCCLR 0xBF886244 constant ODCCSET 0xBF886248 constant ODCCINV 0xBF88624C constant CNPUC 0xBF886250 constant CNPUCCLR 0xBF886254 constant CNPUCSET 0xBF886258 constant CNPUCINV 0xBF88625C constant CNPDC 0xBF886260 constant CNPDCCLR 0xBF886264 constant CNPDCSET 0xBF886268 constant CNPDCINV 0xBF88626C constant CNCONC 0xBF886270 constant CNCONCCLR 0xBF886274 constant CNCONCSET 0xBF886278 constant CNCONCINV 0xBF88627C constant CNENC 0xBF886280 constant CNENCCLR 0xBF886284 constant CNENCSET 0xBF886288 constant CNENCINV 0xBF88628C constant CNSTATC 0xBF886290 constant CNSTATCCLR 0xBF886294 constant CNSTATCSET 0xBF886298 constant CNSTATCINV 0xBF88629C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_pps.bas
// MX1 register Peripheral Pin Select // // Input constant INT1R 0xBF80FA04 constant INT2R 0xBF80FA08 constant INT3R 0xBF80FA0C constant INT4R 0xBF80FA10 constant T2CKR 0xBF80FA18 constant T3CKR 0xBF80FA1C constant T4CKR 0xBF80FA20 constant T5CKR 0xBF80FA24 constant IC1R 0xBF80FA28 constant IC2R 0xBF80FA2C constant IC3R 0xBF80FA30 constant IC4R 0xBF80FA34 constant IC5R 0xBF80FA38 constant OCFAR 0xBF80FA48 constant OCFBR 0xBF80FA4C constant U1RXR 0xBF80FA50 constant U1CTSR 0xBF80FA54 constant U2RXR 0xBF80FA58 constant U2CTSR 0xBF80FA5C constant SDI1R 0xBF80FA84 constant SS1R 0xBF80FA88 constant SDI2R 0xBF80FA90 constant SS2R 0xBF80FA94 constant REFCLKIR 0xBF80FAB8 // Output constant RPA0R 0xBF80FB00 constant RPA1R 0xBF80FB04 constant RPA2R 0xBF80FB08 constant RPA3R 0xBF80FB0C constant RPA4R 0xBF80FB10 constant RPA8R 0xBF80FB20 constant RPA9R 0xBF80FB24 constant RPB0R 0xBF80FB2C constant RPB1R 0xBF80FB30 constant RPB2R 0xBF80FB34 constant RPB3R 0xBF80FB38 constant RPB4R 0xBF80FB3C constant RPB5R 0xBF80FB40 constant RPB6R 0xBF80FB44 constant RPB7R 0xBF80FB48 constant RPB8R 0xBF80FB4C constant RPB9R 0xBF80FB50 constant RPB10R 0xBF80FB54 constant RPB11R 0xBF80FB58 constant RPB12R 0xBF80FB5C constant RPB13R 0xBF80FB60 constant RPB14R 0xBF80FB64 constant RPB15R 0xBF80FB68 constant RPC0R 0xBF80FB6C constant RPC1R 0xBF80FB70 constant RPC2R 0xBF80FB74 constant RPC3R 0xBF80FB78 constant RPC4R 0xBF80FB7C constant RPC5R 0xBF80FB80 constant RPC6R 0xBF80FB84 constant RPC7R 0xBF80FB88 constant RPC8R 0xBF80FB8C constant RPC9R 0xBF80FB90
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_rtc.bas
// MX1 RTC registers // constant RTCCON 0xBF800200 constant RTCCONCLR 0xBF800204 constant RTCCONSET 0xBF800208 constant RTCCONINV 0xBF80020C constant RTCALRM 0xBF800210 constant RTCALRMCLR 0xBF800214 constant RTCALRMSET 0xBF800218 constant RTCALRMINV 0xBF80021C constant RTCTIME 0xBF800220 constant RTCTIMECLR 0xBF800224 constant RTCTIMESET 0xBF800228 constant RTCTIMEINV 0xBF80022C constant RTCDATE 0xBF800230 constant RTCDATECLR 0xBF800234 constant RTCDATESET 0xBF800238 constant RTCDATEINV 0xBF80023C constant ALRMTIME 0xBF800240 constant ALRMTIMECLR 0xBF800244 constant ALRMTIMESET 0xBF800248 constant ALRMTIMEINV 0xBF80024C constant ALRMDATE 0xBF800250 constant ALRMDATECLR 0xBF800254 constant ALRMDATESET 0xBF800258 constant ALRMDATEINV 0xBF80025C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_spi.bas
// MX1 registers SPI // constant SPI1CON 0xBF805800 constant SPI1CONCLR 0xBF805804 constant SPI1CONSET 0xBF805808 constant SPI1CONINV 0xBF80580C constant SPI1STAT 0xBF805810 constant SPI1STATCLR 0xBF805814 constant SPI1STATSET 0xBF805818 constant SPI1STATINV 0xBF80581C constant SPI1BUF 0xBF805820 constant SPI1BRG 0xBF805830 constant SPI1BRGCLR 0xBF805834 constant SPI1BRGSET 0xBF805838 constant SPI1BRGINV 0xBF80583C constant SPI1CON2 0xBF805840 constant SPI1CON2CLR 0xBF805844 constant SPI1CON2SET 0xBF805848 constant SPI1CON2INV 0xBF80584C constant SPI2CON 0xBF805A00 constant SPI2CONCLR 0xBF805A04 constant SPI2CONSET 0xBF805A08 constant SPI2CONINV 0xBF805A0C constant SPI2STAT 0xBF805A10 constant SPI2STATCLR 0xBF805A14 constant SPI2STATSET 0xBF805A18 constant SPI2STATINV 0xBF805A1C constant SPI2BUF 0xBF805A20 constant SPI2BRG 0xBF805A30 constant SPI2BRGCLR 0xBF805A34 constant SPI2BRGSET 0xBF805A38 constant SPI2BRGINV 0xBF805A3C constant SPI2CON2 0xBF805A40 constant SPI2CON2CLR 0xBF805A44 constant SPI2CON2SET 0xBF805A48 constant SPI2CON2INV 0xBF805A4C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_system.bas
// MX1 registers system // constant OSCCON 0xBF80F000 constant OSCCONCLR 0xBF80F004 constant OSCCONSET 0xBF80F008 constant OSCCONINV 0xBF80F00C constant OSCTUN 0xBF80F010 constant OSCTUNCLR 0xBF80F014 constant OSCTUNSET 0xBF80F018 constant OSCTUNINV 0xBF80F01C constant REFOCON 0xBF80F020 constant REFOCONCLR 0xBF80F024 constant REFOCONSET 0xBF80F028 constant REFOCONINV 0xBF80F02C constant REFOTRIM 0xBF80F030 constant REFOTRIMCLR 0xBF80F034 constant REFOTRIMSET 0xBF80F038 constant REFOTRIMINV 0xBF80F03C constant CFGCON 0xBF80F200 constant DDPCON 0xBF80F200 constant DEVID 0xBF80F220 constant SYSKEY 0xBF80F230 constant SYSKEYCLR 0xBF80F234 constant SYSKEYSET 0xBF80F238 constant SYSKEYINV 0xBF80F23C constant PMD1 0xBF80F240 constant PMD1CLR 0xBF80F244 constant PMD1SET 0xBF80F248 constant PMD1INV 0xBF80F24C constant PMD2 0xBF80F250 constant PMD2CLR 0xBF80F254 constant PMD2SET 0xBF80F258 constant PMD2INV 0xBF80F25C constant PMD3 0xBF80F260 constant PMD3CLR 0xBF80F264 constant PMD3SET 0xBF80F268 constant PMD3INV 0xBF80F26C constant PMD4 0xBF80F270 constant PMD4CLR 0xBF80F274 constant PMD4SET 0xBF80F278 constant PMD4INV 0xBF80F27C constant PMD5 0xBF80F280 constant PMD5CLR 0xBF80F284 constant PMD5SET 0xBF80F288 constant PMD5INV 0xBF80F28C constant PMD6 0xBF80F290 constant PMD6CLR 0xBF80F294 constant PMD6SET 0xBF80F298 constant PMD6INV 0xBF80F29C constant NVMCON 0xBF80F400 constant NVMCONCLR 0xBF80F404 constant NVMCONSET 0xBF80F408 constant NVMCONINV 0xBF80F40C constant NVMKEY 0xBF80F410 constant NVMADDR 0xBF80F420 constant NVMADDRCLR 0xBF80F424 constant NVMADDRSET 0xBF80F428 constant NVMADDRINV 0xBF80F42C constant NVMDATA 0xBF80F430 constant NVMSRCADDR 0xBF80F440 constant RCON 0xBF80F600 constant RCONCLR 0xBF80F604 constant RCONSET 0xBF80F608 constant RCONINV 0xBF80F60C constant RSWRST 0xBF80F610 constant RSWRSTCLR 0xBF80F614 constant RSWRSTSET 0xBF80F618 constant RSWRSTINV 0xBF80F61C constant WDTCON 0xBF800000 constant WDTCONCLR 0xBF800004 constant WDTCONSET 0xBF800008 constant WDTCONINV 0xBF80000C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_timer.bas
// MX1 Timer registers // constant T1CON 0xBF800600 constant T1CONCLR 0xBF800604 constant T1CONSET 0xBF800608 constant T1CONINV 0xBF80060C constant TMR1 0xBF800610 constant TMR1CLR 0xBF800614 constant TMR1SET 0xBF800618 constant TMR1INV 0xBF80061C constant PR1 0xBF800620 constant PR1CLR 0xBF800624 constant PR1SET 0xBF800628 constant PR1INV 0xBF80062C constant T2CON 0xBF800800 constant T2CONCLR 0xBF800804 constant T2CONSET 0xBF800808 constant T2CONINV 0xBF80080C constant TMR2 0xBF800810 constant TMR2CLR 0xBF800814 constant TMR2SET 0xBF800818 constant TMR2INV 0xBF80081C constant PR2 0xBF800820 constant PR2CLR 0xBF800824 constant PR2SET 0xBF800828 constant PR2INV 0xBF80082C constant T3CON 0xBF800A00 constant T3CONCLR 0xBF800A04 constant T3CONSET 0xBF800A08 constant T3CONINV 0xBF800A0C constant TMR3 0xBF800A10 constant TMR3CLR 0xBF800A14 constant TMR3SET 0xBF800A18 constant TMR3INV 0xBF800A1C constant PR3 0xBF800A20 constant PR3CLR 0xBF800A24 constant PR3SET 0xBF800A28 constant PR3INV 0xBF800A2C constant T4CON 0xBF800C00 constant T4CONCLR 0xBF800C04 constant T4CONSET 0xBF800C08 constant T4CONINV 0xBF800C0C constant TMR4 0xBF800C10 constant TMR4CLR 0xBF800C14 constant TMR4SET 0xBF800C18 constant TMR4INV 0xBF800C1C constant PR4 0xBF800C20 constant PR4CLR 0xBF800C24 constant PR4SET 0xBF800C28 constant PR4INV 0xBF800C2C constant T5CON 0xBF800E00 constant T5CONCLR 0xBF800E04 constant T5CONSET 0xBF800E08 constant T5CONINV 0xBF800E0C constant TMR5 0xBF800E10 constant TMR5CLR 0xBF800E14 constant TMR5SET 0xBF800E18 constant TMR5INV 0xBF800E1C constant PR5 0xBF800E20 constant PR5CLR 0xBF800E24 constant PR5SET 0xBF800E28 constant PR5INV 0xBF800E2C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_uart1.bas
// MX1 Registers UART1 // constant U1AMODE 0xBF806000 constant U1MODE 0xBF806000 constant U1AMODECLR 0xBF806004 constant U1MODECLR 0xBF806004 constant U1AMODESET 0xBF806008 constant U1MODESET 0xBF806008 constant U1AMODEINV 0xBF80600C constant U1MODEINV 0xBF80600C constant U1ASTA 0xBF806010 constant U1STA 0xBF806010 constant U1ASTACLR 0xBF806014 constant U1STACLR 0xBF806014 constant U1ASTASET 0xBF806018 constant U1STASET 0xBF806018 constant U1ASTAINV 0xBF80601C constant U1STAINV 0xBF80601C constant U1ATXREG 0xBF806020 constant U1TXREG 0xBF806020 constant U1ARXREG 0xBF806030 constant U1RXREG 0xBF806030 constant U1ABRG 0xBF806040 constant U1BRG 0xBF806040 constant U1ABRGCLR 0xBF806044 constant U1BRGCLR 0xBF806044 constant U1ABRGSET 0xBF806048 constant U1BRGSET 0xBF806048 constant U1ABRGINV 0xBF80604C constant U1BRGINV 0xBF80604C
http://byvac.com/mBlib/flb/Library/PIC32MX1_Family/BRegisters/MX1_reg_uart2.bas
// MX1 Registers UART2 // constant U2MODE 0xBF806200 constant U2MODECLR 0xBF806204 constant U2MODESET 0xBF806208 constant U2MODEINV 0xBF80620C constant U2STA 0xBF806210 constant U2STACLR 0xBF806214 constant U2STASET 0xBF806218 constant U2STAINV 0xBF80621C constant U2TXREG 0xBF806220 constant U2RXREG 0xBF806230 constant U2BRG 0xBF806240 constant U2BRGCLR 0xBF806244 constant U2BRGSET 0xBF806248 constant U2BRGINV 0xBF80624C